EDUCATION

• Doctor of Engineering in Computer Engineering
  Universidad Politécnica de Valencia, Valencia, Spain
  Thesis: Towards a Predictable, High-Performance Instruction Memory Hierarchy in Fixed-Priority Preemptive Real-Time Systems
  Year: 2008
  

• Advanced Studies Diploma in Computer Engineering
  Universidad Politécnica de Valencia, Valencia, Spain
  Thesis: Design and Optimisation of a Parallel Genetic Algorithm for Locking Cache Contents Selection
  Year: 2005
  

• Engineer in Electronics
  Universidad del Cauca, Popayán, Colombia
  Thesis: Operating System based on CEPAR
  Year: 1990
  

RESEARCH INTERESTS

• Embedded Real-Time Systems

• High-Performance Computing

PROFESSIONAL EXPERIENCE

• July 2008 -
  Associate Professor
  Pontificia Universidad Javeriana - Cali
  Cali, Colombia
  

• March 2008 - June 2008
  Assistant Professor
  Pontificia Universidad Javeriana - Cali
  Cali, Colombia
  

• January 1995 - December 2003
  Assistant Professor
  Pontificia Universidad Javeriana - Cali
  Cali, Colombia
  

• July 1992 - December 1994
  Instructor
  Pontificia Universidad Javeriana - Cali
  Cali, Colombia
  

• August 1990 - December 1994
  Research Assistant
  Universidad del Cauca
  Popayán, Colombia
  

REFEREED PUBLICATIONS

Book Chapters

• TELEMEC - A Remote Laboratory for Control Engineering Training
  Jordán, R. A., Martínez, A., Tamura, E., Martínez, M. F., Olarte, C. A.
  In: INNOVATIONS 2003: World Innovations in Engineering Education and Research
  Wing Aung, W., Michael H. W. Hoffman, Ng Wun Jern, Robin W. King, Luis M. Sánchez Ruiz (Eds.)
  Begell House Publishing, New York, 2003. pp. 175-184
  ISBN: 0-9741252-0-2
  

Journals

• On Using Locking Caches in Embedded Real-Time Systems
  Martí Campoy, A., Tamura, E., Sáez, S., Rodríguez, F., Busquets-Mataix, J. V.
  In: Proceedings of the 2nd International Conference on Embedded Software and Systems (ICESS-2005)
  Lecture Notes in Computer Science (LNCS) vol. 3820, pp. 150-159.
  ISSN 0302-9743 (Print) 1611-3349 (Online).
  Science Citation Index Expanded 2005
  Acceptance Ratio: 17.5%
  Laurence T. Yang, Xingshe Zhou, Wei Zhao, Zhaohui Wu, Yian Zhu, Man Lin (eds.)
  Springer-Verlag, Berlin Heidelberg 2005
  ISBN-10: 3-540-30881-4
  ISBN-13: 978-3-540-30881-2
  

• A Parallel Genetic Algorithm for Locking-Cache Contents Selection in Pre-Emptive Real-Time Systems
  Tamura, E., Busquets-Mataix, J. V., Martí Campoy, A.
  Epiciclos, 2005. vol. 4, no. 1, pp. 9-26
  ISSN: 1657-5636
  

• Ambiente Integrado para o Desenvolvimento de Software para Sistemas de Telecomunicações
  Tamura, E., Castellanos, G. A.
  Revista Telebrás, Brasília, vol. 18, no. 62, pp. 79-90
  Telebrás, 1994
  ISSN: 0101-0093
  

Proceedings

• Parallel Implementation of a Genetic Algorithm Using a Grid
  Antonio Marti Campoy, Eugenio Tamura, Francisco Rodriguez-Ballester, Juan Jose Serrano
  In: Proceedings of the 2009 International Conference on Grid Computing (GCA'09) | The 2009 World Congress in Computer Science, Computer Engineering, and Applied Computing (WORLDCOMP'09), pp. 92-98
  Hamid R. Arabnia, George A. Gravvanis, Ashu M. G. Solo (eds.)
  CSREA Press, U.S.A. 2009
  ISBN: 1-60132-105-8
  

• Towards Predictable, High-Performance Memory Hierarchies in Fixed-Priority Preemptive Multitasking Real-Time Systems
  Tamura, E., Busquets-Mataix, J. V., Martí Campoy, A.
  In: Proceedings of the 15th International Conference on Real-Time and Network Systems (RTNS-2007), pp. 75-84
  Isabelle Puaut, Nicolas Navet, Françoise Simonot-Lion (eds.)
  Institut National Polytechnique de Lorraine - Atelier de Reprographie, Vandoeuvre 2007
  ISBN: 2-905267-53-4
  

• A Comparison of Three Genetic Algorithms for Locking Cache Contents Selection in Real-Time Systems
  Tamura, E., Busquets-Mataix, J. V., Serrano Martín, J. J., Martí Campoy, A.
  In: Adaptive and Natural Computing Algorithms. Proceedings of the International Conference on Adaptive and Natural Computing Algorithms (ICANNGA 2005)
  Bernardete Ribeiro, Rudolf F. Albrecht, Andrej Dobnikar, David W. Pearson, Nigel C. Steele (eds.)
  Springer, Wien New York, 2005. pp. 462-465
  ISBN: 3-211-24934-6
  

• High Performance Memory Architectures with Dynamic Locking Cache for Real-Time Systems
  Tamura, E., Rodríguez, F., Busquets-Mataix, J. V., Martí Campoy, A.
  In: Proceedings of the Work-In-Progress Session of the 16th Euromicro Conference on Real-Time Systems (WIP ECRTS 04)
  Technical Report TR-UNL-CSE-2004-0010, from the University of Nebraska-Lincoln, Department of Computer Science and Engineering, 2004. pp. 1-4
  

• Development of an Application to Handle Mechatronic Systems via Internet
  Jordán, R. A., Martínez, A., Tamura, E., Martínez, M. F., Olarte, C. A.
  In: Proceedings of the International Conference on Information and Communication Technologies in Education (ICTE 2002)
  Serie: Sociedad de la Información. Badajoz, Junta de Extremadura. Consejería de Educación, Ciencia y Tecnología, 2002. pp. 482-486
  ISBN: 84-95251-77-9
  

• Sistema Mecatrónico Teleoperado, como Herramienta para un Laboratorio de Control Automático (TELEMEC)
  In: Memorias de la XXII Reunión Nacional de Facultades de Ingeniería - La Internacionalización y la Virtualidad en la Formación en Ingeniería
  ACOFI, 2002
  

• A Remote Laboratory for an Automatic Control Electromechanical System
  Jordán, R. A., Martínez, A., Tamura, E., Martínez, M. F., Olarte, C. A.
  In: Proceedings of the International Conference on Engineering Education (ICEE 2002 - Partnership, Policy, Practice)
  UMIST - International Network for Engineering Education and Research, 2002.
  

• Desarrollo de un Sistema Mecatrónico, Manejable por Internet, como Herramienta para un Laboratorio de Control Automático
  Linares, C. A., López, A. M., Olarte, C. A., Restrepo, M. S., Jordán, R. A., Martínez, A., Tamura, E.
  In: Memoria Técnica del XII Congreso Interuniversitario Electrónica, Computación y Eléctrica (CIECE 2002)
  Rama Estudiantil del IEEE - Instituto Tecnológico de la Laguna, 2002. vol. 1, pp. 520-525
  

• Conjunto Modular y Flexible para la realización de sistemas mecatrónicos manejable por Internet
  Grupo de Automática y Robótica
  In: Memorias V Taller Internacional de Software Educativo (TISE '01)
  Universidad de Chile, 2001.
  

• Ambiente CTD: Desarrollo de Sistemas de Tiempo Real utilizando Especificaciones Ejecutables
  De La Cruz, J. D., Tamura, E., Rendón, A.
  In: Anales del VIII Congreso Latinoamericano de Control Automático (CLCA´98)
  Asociación Chilena de Control Automático, 1998. vol. II, pp. 565-570
  

• Interfaz RDSI E1 para PC: Una alternativa económica para comunicaciones rurales
  Vergara, M. A., Tamura, E.
  In: Memorias del X Congreso Nacional de Telecomunicaciones y I Andino, 1995.
  

• Ambiente Integrado para el Desarrollo de Software para Sistemas de Telecomunicaciones
  Tamura, E., Castellanos, G. A.
  In: Memorias VII Jornadas de Electrónica y Telecomunicaciones
  ACIEM Cundinamarca, 1994
  

• Sistemas Empotrados de Tiempo Real
  Tamura, E., Vergara, M. A.
  In: Memorias Jornadas de Actualización en Informática
  Universidad del Cauca, 1993. pp. 1-13
  

OTHER SELECTED PUBLICATIONS

• Jumpstart Introduction to Designing with Alliance
  Tamura, E.
  In: Alliance home pages
  Architecture des Systèmes intégrés et Micro électronique
  Laboratoire d'Informatique de Paris 6
  Pierre et Marie Curie University (Paris VI, France)
  

PROFESSIONAL AFFILIATIONS

• IEEE member
  
• IEEE Computer Society member
  

FURTHER INFORMATION

Further Details Available in the database of the Sistema Nacional de Ciencia Tecnología e Innovación (Science, Technology and Innovation National Program) from COLCIENCIAS - Instituto Colombiano para el Desarrollo de la Ciencia y la Tecnología "Francisco José de Caldas"

Last update: Thursday, September 25, 2008 by Tek